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00001 /* ---------------------------------------------------------------------------- 00002 * ATMEL Microcontroller Software Support 00003 * ---------------------------------------------------------------------------- 00004 * Copyright (c) 2008, Atmel Corporation 00005 * 00006 * All rights reserved. 00007 * 00008 * Redistribution and use in source and binary forms, with or without 00009 * modification, are permitted provided that the following conditions are met: 00010 * 00011 * - Redistributions of source code must retain the above copyright notice, 00012 * this list of conditions and the disclaimer below. 00013 * 00014 * Atmel's name may not be used to endorse or promote products derived from 00015 * this software without specific prior written permission. 00016 * 00017 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR 00018 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 00019 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 00020 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, 00021 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 00022 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 00023 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 00024 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 00025 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 00026 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00027 * ---------------------------------------------------------------------------- 00028 */ 00029 00030 //------------------------------------------------------------------------------ 00031 // Headers 00032 //------------------------------------------------------------------------------ 00033 00034 #include <board.h> 00035 #include <adc/adc.h> 00036 #include <utility/trace.h> 00037 #include <utility/assert.h> 00038 00039 //----------------------------------------------------------------------------- 00043 //----------------------------------------------------------------------------- 00044 static void ADC_CfgModeReg (AT91S_ADC *pAdc, unsigned int mode) { 00045 ASSERT ( (mode&0xF08000C0) == 0, "ADC Bad configuration ADC MR"); 00046 00047 // Clear the register 00048 pAdc->ADC_MR = 0; 00049 // Write to the MR register 00050 pAdc->ADC_MR = mode; 00051 } 00052 00053 //------------------------------------------------------------------------------ 00054 // Global Functions 00055 //------------------------------------------------------------------------------ 00056 00057 //----------------------------------------------------------------------------- 00069 //----------------------------------------------------------------------------- 00070 void ADC_Initialize (AT91S_ADC *pAdc, 00071 unsigned char idAdc, 00072 unsigned char trgEn, 00073 unsigned char trgSel, 00074 unsigned char sleepMode, 00075 unsigned char resolution, 00076 unsigned int mckClock, 00077 unsigned int adcClock, 00078 unsigned int startupTime, 00079 unsigned int sampleAndHoldTime) { 00080 unsigned int prescal; 00081 unsigned int startup; 00082 unsigned int shtim; 00083 00084 ASSERT (startupTime <= ADC_STARTUP_TIME_MAX, "ADC Bad startupTime\n\r"); 00085 ASSERT (sampleAndHoldTime >= ADC_TRACK_HOLD_TIME_MIN, "ADC Bad sampleAndHoldTime\n\r"); 00102 prescal = (mckClock / (2 * adcClock)) - 1; 00103 startup = ( (adcClock / 1000000) * startupTime / 8) - 1; 00104 shtim = ( ( (adcClock / 1000000) * sampleAndHoldTime) / 1000) - 1; 00105 00106 ASSERT ( (prescal < 0x3F), "ADC Bad PRESCAL\n\r"); 00107 ASSERT (startup < 0x7F, "ADC Bad STARTUP\n\r"); 00108 ASSERT (shtim < 0xF, "ADC Bad SampleAndHoldTime\n\r"); 00109 00110 TRACE_DEBUG ("adcClock:%d MasterClock:%d\n\r", (mckClock / ( (prescal + 1) *2)), mckClock); 00111 TRACE_DEBUG ("prescal:0x%X startup:0x%X shtim:0x%X\n\r", prescal, startup, shtim); 00112 00113 if (adcClock != (mckClock / ( (prescal + 1) *2))) { 00114 TRACE_WARNING ("User and calculated adcClocks are different : user=%d calc=%d\n\r", 00115 adcClock, (mckClock / ( (prescal + 1) *2))); 00116 } 00117 00118 // Enable peripheral clock 00119 AT91C_BASE_PMC->PMC_PCER = 1 << idAdc; 00120 00121 // Reset the controller 00122 ADC_SoftReset (pAdc); 00123 00124 // Write to the MR register 00125 ADC_CfgModeReg (pAdc, 00126 (trgEn & AT91C_ADC_TRGEN) 00127 | (trgSel & AT91C_ADC_TRGSEL) 00128 | (resolution & AT91C_ADC_LOWRES) 00129 | (sleepMode & AT91C_ADC_SLEEP) 00130 | ( (prescal << 8) & AT91C_ADC_PRESCAL) 00131 | ( (startup << 16) & AT91C_ADC_STARTUP) 00132 | ( (shtim << 24) & AT91C_ADC_SHTIM)); 00133 } 00134 00135 //----------------------------------------------------------------------------- 00139 //----------------------------------------------------------------------------- 00140 unsigned int ADC_GetModeReg (AT91S_ADC *pAdc) { 00141 return pAdc->ADC_MR; 00142 } 00143 00144 //----------------------------------------------------------------------------- 00148 //----------------------------------------------------------------------------- 00149 void ADC_EnableChannel (AT91S_ADC *pAdc, unsigned int channel) { 00150 ASSERT (channel < 8, "ADC Channel not exist"); 00151 00152 // Write to the CHER register 00153 pAdc->ADC_CHER = (1 << channel); 00154 } 00155 00156 //----------------------------------------------------------------------------- 00160 //----------------------------------------------------------------------------- 00161 void ADC_DisableChannel (AT91S_ADC *pAdc, unsigned int channel) { 00162 ASSERT (channel < 8, "ADC Channel not exist"); 00163 00164 // Write to the CHDR register 00165 pAdc->ADC_CHDR = (1 << channel); 00166 } 00167 00168 //----------------------------------------------------------------------------- 00172 //----------------------------------------------------------------------------- 00173 unsigned int ADC_GetChannelStatus (AT91S_ADC *pAdc) { 00174 return pAdc->ADC_CHSR; 00175 } 00176 00177 //----------------------------------------------------------------------------- 00180 //----------------------------------------------------------------------------- 00181 void ADC_StartConversion (AT91S_ADC *pAdc) { 00182 pAdc->ADC_CR = AT91C_ADC_START; 00183 } 00184 00185 //----------------------------------------------------------------------------- 00188 //----------------------------------------------------------------------------- 00189 void ADC_SoftReset (AT91S_ADC *pAdc) { 00190 pAdc->ADC_CR = AT91C_ADC_SWRST; 00191 } 00192 00193 //----------------------------------------------------------------------------- 00197 //----------------------------------------------------------------------------- 00198 unsigned int ADC_GetLastConvertedData (AT91S_ADC *pAdc) { 00199 return pAdc->ADC_LCDR; 00200 } 00201 00202 //----------------------------------------------------------------------------- 00207 //----------------------------------------------------------------------------- 00208 unsigned int ADC_GetConvertedData (AT91S_ADC *pAdc, unsigned int channel) { 00209 unsigned int data = 0; 00210 00211 ASSERT (channel < 8, "ADC channel not exist"); 00212 00213 switch (channel) { 00214 case 0: 00215 data = pAdc->ADC_CDR0; 00216 break; 00217 case 1: 00218 data = pAdc->ADC_CDR1; 00219 break; 00220 case 2: 00221 data = pAdc->ADC_CDR2; 00222 break; 00223 case 3: 00224 data = pAdc->ADC_CDR3; 00225 break; 00226 case 4: 00227 data = pAdc->ADC_CDR4; 00228 break; 00229 case 5: 00230 data = pAdc->ADC_CDR5; 00231 break; 00232 case 6: 00233 data = pAdc->ADC_CDR6; 00234 break; 00235 case 7: 00236 data = pAdc->ADC_CDR7; 00237 break; 00238 } 00239 return data; 00240 } 00241 00242 //----------------------------------------------------------------------------- 00246 //----------------------------------------------------------------------------- 00247 void ADC_EnableIt (AT91S_ADC *pAdc, unsigned int flag) { 00248 ASSERT ( (flag&0xFFF00000) == 0, "ADC bad interrupt IER"); 00249 00250 // Write to the IER register 00251 if (flag > 0xFFFF) { 00252 // General interrupt 00253 pAdc->ADC_IER = flag; 00254 } else if (flag > 0xFF) { 00255 // Overun interrupt 00256 pAdc->ADC_IER = 1 << flag << 8; 00257 } else { 00258 // Channel interrupt 00259 pAdc->ADC_IER = 1 << flag; 00260 } 00261 } 00262 00263 //----------------------------------------------------------------------------- 00266 //----------------------------------------------------------------------------- 00267 void ADC_EnableDataReadyIt (AT91S_ADC *pAdc) { 00268 pAdc->ADC_IER = AT91C_ADC_DRDY; 00269 } 00270 00271 //----------------------------------------------------------------------------- 00275 //----------------------------------------------------------------------------- 00276 void ADC_DisableIt (AT91S_ADC *pAdc, unsigned int flag) { 00277 ASSERT ( (flag&0xFFF00000) == 0, "ADC bad interrupt IDR"); 00278 00279 // Write to the IDR register 00280 if (flag > 0xFFFF) { 00281 // general interrupt 00282 pAdc->ADC_IDR = flag; 00283 } else if (flag > 0xFF) { 00284 // Overun interrupt 00285 pAdc->ADC_IDR = 1 << flag << 8; 00286 } else { 00287 // Channel interrupt 00288 pAdc->ADC_IDR = 1 << flag; 00289 } 00290 } 00291 00292 //----------------------------------------------------------------------------- 00296 //----------------------------------------------------------------------------- 00297 unsigned int ADC_GetStatus (AT91S_ADC *pAdc) { 00298 return pAdc->ADC_SR; 00299 } 00300 00301 //----------------------------------------------------------------------------- 00305 //----------------------------------------------------------------------------- 00306 unsigned int ADC_GetInterruptMaskStatus (AT91S_ADC *pAdc) { 00307 return pAdc->ADC_IMR; 00308 } 00309 00310 //----------------------------------------------------------------------------- 00315 //----------------------------------------------------------------------------- 00316 unsigned int ADC_IsInterruptMasked (AT91S_ADC *pAdc, unsigned int flag) { 00317 return (ADC_GetInterruptMaskStatus (pAdc) & flag); 00318 } 00319 00320 //----------------------------------------------------------------------------- 00325 //----------------------------------------------------------------------------- 00326 unsigned int ADC_IsStatusSet (AT91S_ADC *pAdc, unsigned int flag) { 00327 return (ADC_GetStatus (pAdc) & flag); 00328 } 00329 00330 00331 //----------------------------------------------------------------------------- 00336 //----------------------------------------------------------------------------- 00337 unsigned char ADC_IsChannelInterruptStatusSet (unsigned int adc_sr, 00338 unsigned int channel) { 00339 unsigned char status; 00340 00341 if ( (adc_sr & (1 << channel)) == (1 << channel)) { 00342 status = 1; 00343 } else { 00344 status = 0; 00345 } 00346 return status; 00347 } 00348 00349